In depth characterization of electron transport devices in 14 nm FD-SOI CMOS
DC Field | Value | Language |
---|---|---|
dc.contributor.author | Shin, Minju | - |
dc.contributor.author | Shi, Ming | - |
dc.contributor.author | Mouis, Mireille | - |
dc.contributor.author | Cros, Antoine | - |
dc.contributor.author | Josse, Emmanuel | - |
dc.contributor.author | Kim, Gyu-Tae | - |
dc.contributor.author | Ghibaudo, Gerard | - |
dc.date.accessioned | 2021-09-04T11:48:39Z | - |
dc.date.available | 2021-09-04T11:48:39Z | - |
dc.date.created | 2021-06-18 | - |
dc.date.issued | 2015-10 | - |
dc.identifier.issn | 0038-1101 | - |
dc.identifier.uri | https://scholar.korea.ac.kr/handle/2021.sw.korea/92236 | - |
dc.description.abstract | In this paper, carrier transport properties in highly scaled (down to 14 nm-node) FDSOI CMOS devices are presented from 77 K to 300 K. At first, we analyzed electron transport characteristics in terms of different gate-oxide stack in NMOS long devices. So, we found that SOP and RCS can be the dominant contribution of additional mobility scatterings in different temperature regions. Then, electron mobility degradation in short channel devices was deeply investigated. It can be stemmed from additional scattering mechanisms, which were attributed to process-induced defects near source and drain. Finally, we found that mobility enhancement by replacing Si to SiGe channel in PMOS devices was validated and this feature was not effective anymore in sub-100 nm devices. The critical lengths were around 50 nm and 100 nm for NMOS and PMOS devices, respectively. (C) 2015 Published by Elsevier Ltd. | - |
dc.language | English | - |
dc.language.iso | en | - |
dc.publisher | PERGAMON-ELSEVIER SCIENCE LTD | - |
dc.subject | MOSFETS | - |
dc.subject | EXTRACTION | - |
dc.subject | MOBILITY | - |
dc.title | In depth characterization of electron transport devices in 14 nm FD-SOI CMOS | - |
dc.type | Article | - |
dc.contributor.affiliatedAuthor | Kim, Gyu-Tae | - |
dc.identifier.doi | 10.1016/j.sse.2015.02.012 | - |
dc.identifier.scopusid | 2-s2.0-84953357399 | - |
dc.identifier.wosid | 000358970000003 | - |
dc.identifier.bibliographicCitation | SOLID-STATE ELECTRONICS, v.112, pp.13 - 18 | - |
dc.relation.isPartOf | SOLID-STATE ELECTRONICS | - |
dc.citation.title | SOLID-STATE ELECTRONICS | - |
dc.citation.volume | 112 | - |
dc.citation.startPage | 13 | - |
dc.citation.endPage | 18 | - |
dc.type.rims | ART | - |
dc.type.docType | Article | - |
dc.description.journalClass | 1 | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
dc.relation.journalResearchArea | Physics | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.relation.journalWebOfScienceCategory | Physics, Applied | - |
dc.relation.journalWebOfScienceCategory | Physics, Condensed Matter | - |
dc.subject.keywordPlus | MOSFETS | - |
dc.subject.keywordPlus | EXTRACTION | - |
dc.subject.keywordPlus | MOBILITY | - |
dc.subject.keywordAuthor | UTBB | - |
dc.subject.keywordAuthor | FD-SOI | - |
dc.subject.keywordAuthor | High-k/metal gate stack | - |
dc.subject.keywordAuthor | Neutral defects | - |
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