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Subthreshold swing characteristics of nanowire tunneling FETs with variation in gate coverage and channel diameter

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dc.contributor.authorKim, Minsuk-
dc.contributor.authorJeon, Youngin-
dc.contributor.authorKim, Yoonjoong-
dc.contributor.authorKim, Sangsig-
dc.date.accessioned2021-09-04T14:48:50Z-
dc.date.available2021-09-04T14:48:50Z-
dc.date.created2021-06-16-
dc.date.issued2015-07-
dc.identifier.issn1567-1739-
dc.identifier.urihttps://scholar.korea.ac.kr/handle/2021.sw.korea/93150-
dc.description.abstractIn this study, we demonstrate the simulated subthreshold swing (SS) of silicon nanowire tunneling field-effect transistors (NWTFETs) by varying both the channel diameter from 10 nm to 40 nm and the gate coverage ratio from 30% to 100%. Our simulation work reveals that both a decrease in the channel diameter and an increase in the gate coverage ratio contribute to a reduction in the SS. Additionally, our work shows that the magnitude of the on-current depends linearly on the gate coverage ratio and that the drain current increases with a decrease in the channel diameter. Thus, an NWTFET with a channel diameter of 10 nm and a gate coverage ratio of 100% exhibits superior electrical characteristics over other silicon NWTFETs in that the NWTFET shows a point SS of 22.7 mV/dec, an average SS of 56.3 mV/dec, an on/off current ratio of similar to 10(13), and an on-current of similar to 10(-5) A/mu m. (C) 2015 Elsevier B.V. All rights reserved.-
dc.languageEnglish-
dc.language.isoen-
dc.publisherELSEVIER-
dc.subjectPERFORMANCE-
dc.titleSubthreshold swing characteristics of nanowire tunneling FETs with variation in gate coverage and channel diameter-
dc.typeArticle-
dc.contributor.affiliatedAuthorKim, Sangsig-
dc.identifier.doi10.1016/j.cap.2015.04.024-
dc.identifier.scopusid2-s2.0-84929484179-
dc.identifier.wosid000355003500005-
dc.identifier.bibliographicCitationCURRENT APPLIED PHYSICS, v.15, no.7, pp.780 - 783-
dc.relation.isPartOfCURRENT APPLIED PHYSICS-
dc.citation.titleCURRENT APPLIED PHYSICS-
dc.citation.volume15-
dc.citation.number7-
dc.citation.startPage780-
dc.citation.endPage783-
dc.type.rimsART-
dc.type.docTypeArticle-
dc.identifier.kciidART002014554-
dc.description.journalClass1-
dc.description.journalRegisteredClassscie-
dc.description.journalRegisteredClassscopus-
dc.description.journalRegisteredClasskci-
dc.relation.journalResearchAreaMaterials Science-
dc.relation.journalResearchAreaPhysics-
dc.relation.journalWebOfScienceCategoryMaterials Science, Multidisciplinary-
dc.relation.journalWebOfScienceCategoryPhysics, Applied-
dc.subject.keywordPlusPERFORMANCE-
dc.subject.keywordAuthorNanowire-
dc.subject.keywordAuthorTunneling field effect transistor (TFET)-
dc.subject.keywordAuthorSubthreshold swing (SS)-
dc.subject.keywordAuthorGate coverage-
dc.subject.keywordAuthorSub-60 mV/dec-
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