Si-Nanowire-Array-Based NOT-Logic Circuits Constructed on Plastic Substrates Using Top-Down Methods
- Authors
- Jeon, Youngin; Kang, Jeongmin; Lee, Myeongwon; Moon, Taeho; Kim, Sangsig
- Issue Date
- 5월-2013
- Publisher
- AMER SCIENTIFIC PUBLISHERS
- Keywords
- Silicon-Nanowire Array; Top-Down Approach; Field-Effect Transistor; NOT-Logic Circuit; Plastic Substrate
- Citation
- JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, v.13, no.5, pp.3350 - 3353
- Indexed
- SCIE
SCOPUS
- Journal Title
- JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY
- Volume
- 13
- Number
- 5
- Start Page
- 3350
- End Page
- 3353
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/103277
- DOI
- 10.1166/jnn.2013.7229
- ISSN
- 1533-4880
- Abstract
- Si-nanowire (NW)-array-based NOT-logic circuits were constructed on plastic substrates. The Si-NW arrays were fabricated on a Si wafer through top down methods, including conventional photolithography and crystallographic wet etching, and transferred onto the plastic substrates. Two field-effect transistors were fabricated on a single Si-NW array composed of five nanowires aligned in parallel and connected in series to form NOT-logic circuits. The excellent flexibility of the fabricated device was confirmed by bending-cycling tests. The voltage-transfer curve of the NOT-logic circuits showed an inverting operation with a logic swing of similar to 92% and voltage gain of similar to 2.5.
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