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Subthreshold Degradation of Gate-all-Around Silicon Nanowire Field-Effect Transistors: Effect of Interface Trap Charge
- Authors
- Hong, B. H.; Cho, N.; Lee, S. J.; Yu, Y. S.; Choi, L.; Jung, Y. C.; Cho, K. H.; Yeo, K. H.; Kim, D. -W.; Jin, G. Y.; Oh, K. S.; Park, D.; Song, S. -H.; Rieh, J. -S.; Hwang, S. W.
- Issue Date
- Sep-2011
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- Gate-all-around (GAA); interface trap charge; silicon nanowire field-effect transistor (SNWFET); subthreshold degradation
- Citation
- IEEE ELECTRON DEVICE LETTERS, v.32, no.9, pp.1179 - 1181
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE ELECTRON DEVICE LETTERS
- Volume
- 32
- Number
- 9
- Start Page
- 1179
- End Page
- 1181
- ISSN
- 0741-3106
- Abstract
- We measured and analyzed the subthreshold degradation of the gate-all-around (GAA) silicon nanowire field-effect transistors with the length of 300/500 nm and the radius of 5 nm. An analytical model incorporating the effect of interface traps quantitatively explained the measured subthreshold swing (SS) degradation. A simple electrostatic argument showed that the GAA device had smaller degradation of SS values than planar devices for the same interface trap densities.
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Related Researcher
- Rieh, Jae Sung
- College of Engineering (School of Electrical Engineering)