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Design and Simulation of Logic-In-Memory Inverter Based on a Silicon Nanowire Feedback Field-Effect Transistoropen access

Authors
Baek, EunwooSon, JaeminCho, KyoungahKim, Sangsig
Issue Date
Apr-2022
Publisher
MDPI
Keywords
feedback field-effect transistor; logic-in-memory; mixed-mode simulation; positive feedback loop; silicon nanowire
Citation
MICROMACHINES, v.13, no.4
Indexed
SCIE
SCOPUS
Journal Title
MICROMACHINES
Volume
13
Number
4
URI
https://scholar.korea.ac.kr/handle/2021.sw.korea/140822
DOI
10.3390/mi13040590
ISSN
2072-666X
Abstract
In this paper, we propose a logic-in-memory (LIM) inverter comprising a silicon nanowire (SiNW) n-channel feedback field-effect transistor (n-FBFET) and a SiNW p-channel metal oxide semiconductor field-effect transistor (p-MOSFET). The hybrid logic and memory operations of the LIM inverter were investigated by mixed-mode technology computer-aided design simulations. Our LIM inverter exhibited a high voltage gain of 296.8 (V/V) when transitioning from logic '1' to '0' and 7.9 (V/V) when transitioning from logic '0' to '1', while holding calculated logic at zero input voltage. The energy band diagrams of the n-FBFET structure demonstrated that the holding operation of the inverter was implemented by controlling the positive feedback loop. Moreover, the output logic can remain constant without any supply voltage, resulting in zero static power consumption.
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