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Characterization of a CMOS 135-GHz Low Noise Amplifier with Two Different Noise Measurement Methods

Authors
Kim, DoyoonKim, SooyeonSong, KiryongKim, JungsooYoo, JunghwanRieh, Jae-Sung
Issue Date
8월-2018
Publisher
IEEK PUBLICATION CENTER
Keywords
Noise; Y-factor method; N-times power method; 65 nm CMOS; Low-noise amplifier
Citation
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, v.18, no.4, pp.536 - 540
Indexed
SCIE
SCOPUS
KCI
Journal Title
JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE
Volume
18
Number
4
Start Page
536
End Page
540
URI
https://scholar.korea.ac.kr/handle/2021.sw.korea/74243
DOI
10.5573/JSTS.2018.18.4.536
ISSN
1598-1657
Abstract
A D-band low-noise amplifier (LNA) has been developed based on a 65-nm CMOS technology, which showed a measured peak gain of 16.1 dB at 134.5 GHz. The noise property of the fabricated amplifier was characterized with two different noise measurement techniques: the cryogenic Y-factor method and the N-times power method. The two methods showed a minimum value of the noise figure of 10.7 dB and 14.7 dB, respectively.
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공과대학 (전기전자공학부)
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