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A SPICE model of silicon tunneling field-effect transistors

Authors
Woo, SolaKim, MinsukKim, Sangsig
Issue Date
5-5월-2018
Publisher
ELSEVIER SCIENCE BV
Keywords
Tunnel FET; Calibration; TCAD simulation; SPICE model; Device modeling
Citation
MICROELECTRONIC ENGINEERING, v.191, pp.66 - 71
Indexed
SCIE
SCOPUS
Journal Title
MICROELECTRONIC ENGINEERING
Volume
191
Start Page
66
End Page
71
URI
https://scholar.korea.ac.kr/handle/2021.sw.korea/75568
DOI
10.1016/j.mee.2018.01.028
ISSN
0167-9317
Abstract
In this study, we propose a precise model of silicon tunneling field-effect transistors (TFETs) by modifying the Kane-Sze tunneling formula. In our model, a reference device is calibrated by utilizing TCAD and SPICE simulation. Electrical parameters extracted in our TCAD simulation are applied to a SPICE model not only for adopting the off-state current of a p-i-n diode under a reverse bias state but also for developing the threshold voltage and electric field equations. Furthermore, a basic complementary TFET inverter is simulated to demonstrate the capabilities of our proposed model. (C) 2018 Elsevier B.V. All rights reserved.
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공과대학 (전기전자공학부)
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