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Silicon nanowire CMOS NOR logic gates featuring one-volt operation on bendable substrates

Authors
Moon, JeongjeKim, YoonjoongLim, DoohyeokKim, Sangsig
Issue Date
May-2018
Publisher
TSINGHUA UNIV PRESS
Keywords
field-effect transistor; silicon nanowire; NOR logic gate; bendable substrate
Citation
NANO RESEARCH, v.11, no.5, pp.2625 - 2631
Indexed
SCIE
SCOPUS
Journal Title
NANO RESEARCH
Volume
11
Number
5
Start Page
2625
End Page
2631
URI
https://scholar.korea.ac.kr/handle/2021.sw.korea/76046
DOI
10.1007/s12274-017-1889-4
ISSN
1998-0124
Abstract
In this study, we propose complementary metal-oxide-semiconductor (CMOS) NOR logic gates consisting of silicon nanowire (NW) arrays on bendable substrates. A circuit consisting of two p-channel NW field-effect transistors (NWFETs) in series and two n-channel NWFETs in parallel is constructed to operate a two-input CMOS NOR logic gate. The NOR logic gates operate at a low supply voltage of 1 V with a rail-to-rail logic swing and a high voltage gain of approximately -3.0. The exact NOR logic functionality is achieved owing to the superior electrical characteristics of the well-aligned p- and n-NWFETs, which are obtained using conventional Si-based CMOS technology. Moreover, the NOR logic gates exhibit stable characteristics and have good mechanical properties. The proposed bendable NW CMOS NOR logic gates are promising building blocks for future bendable integrated electronics.
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