Theoretical and Experimental Investigation of Graphene/High-kappa/p-Si Junctions
- Authors
- Shim, Jaewoo; Yoo, Gwangwe; Kang, Dong-Ho; Jung, Woo-Shik; Byun, Young-Chul; Kim, Hyoungsub; Kang, Won Tae; Yu, Woo Jong; Yu, Hyun-Yong; Park, Yongkook; Park, Jin-Hong
- Issue Date
- 1월-2016
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- Graphene; high-kappa; Schottky; GS junction
- Citation
- IEEE ELECTRON DEVICE LETTERS, v.37, no.1, pp.4 - 7
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE ELECTRON DEVICE LETTERS
- Volume
- 37
- Number
- 1
- Start Page
- 4
- End Page
- 7
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/89922
- DOI
- 10.1109/LED.2015.2497714
- ISSN
- 0741-3106
- Abstract
- Here, we theoretically and experimentally investigate the impact of a high-kappa layer inserted between graphene and p-Si in a graphene/Si junction. We have achieved 86-fold and 222-fold reductions in a specific contact resistivity (rho(c)) by inserting 1-nm-thick Al2O3 and 2-nm-thick TiO2 in the graphene-semiconductor junction, respectively, corresponding to lowering the effective barrier height by 0.24 and 0.12 eV. Furthermore, we propose a graphene-induced gap state model that simultaneously considers the graphene's modulation by a gate bias and the effect of the high-kappa insertion.
- Files in This Item
- There are no files associated with this item.
- Appears in
Collections - College of Engineering > School of Electrical Engineering > 1. Journal Articles
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.