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The Efficacy of Metal-Interfacial Layer-Semiconductor Source/Drain Structure on Sub-10-nm n-Type Ge FinFET Performances
- Authors
- Kim, Jeong-Kyu; Kim, Gwang-Sik; Nam, Hyohyun; Shin, Changhwan; Park, Jin-Hong; Kim, Jong-Kook; Cho, Byung Jin; Saraswat, Krishna C.; Yu, Hyun-Yong
- Issue Date
- Dec-2014
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Keywords
- CMOS; contact resistance; FinFET; germanium; interfacial layer; MOSFET; source/drain
- Citation
- IEEE ELECTRON DEVICE LETTERS, v.35, no.12, pp.1185 - 1187
- Indexed
- SCIE
SCOPUS
- Journal Title
- IEEE ELECTRON DEVICE LETTERS
- Volume
- 35
- Number
- 12
- Start Page
- 1185
- End Page
- 1187
- ISSN
- 0741-3106
- Abstract
- We investigate the impact of metal-interfacial layer-semiconductor source/drain (M-I-S S/D) structure with heavily doped n-type interfacial layer (n(+)-IL) or with undoped IL on sub-10-nm n-type germanium (Ge) FinFET device performance using 3-D TCAD simulations. Compared to the metal-semiconductor S/D structure, the M-I-S S/D structures provide much lower contact resistivity. Especially, theM-I-S S/D structure with n(+)-IL provides much lower contact resistivity, resulting in similar to 5x lower contact resistivity than 1x10(-8) Omega-cm(2), specified in International Technology Roadmap for Semiconductors. In addition, we found that the M-I-S structure with n(+)-IL remarkably suppresses the sensitivity of contact resistivity to S/D doping concentration.
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Related Researcher
- Kim, Jong Kook
- College of Engineering (School of Electrical Engineering)