Full split C-V method for parameter extraction in ultra thin BOX FDSOI MOS devices
- Authors
- Shin, Minju; Shi, Ming; Mouis, Mireille; Cros, Antoine; Josse, Emmanuel; Kim, Gyu-Tae; Ghibaudo, Gerard
- Issue Date
- Sep-2014
- Publisher
- PERGAMON-ELSEVIER SCIENCE LTD
- Keywords
- SOI; Split CV; UTBB; MOS
- Citation
- SOLID-STATE ELECTRONICS, v.99, pp 104 - 107
- Pages
- 4
- Indexed
- SCI
SCIE
SCOPUS
- Journal Title
- SOLID-STATE ELECTRONICS
- Volume
- 99
- Start Page
- 104
- End Page
- 107
- URI
- https://scholar.korea.ac.kr/handle/2021.sw.korea/97534
- DOI
- 10.1016/j.sse.2014.04.039
- ISSN
- 0038-1101
1879-2405
- Abstract
- The feasibility of full split C-V method in ultra-thin body and BOX (UTBB) FDSOI devices is demonstrated, emphasizing the usefulness of gate-to-bulk capacitance. The split C-V measurements carried out on both gate-to-channel and gate-to-bulk mode are shown to be consistent with TCAD simulation. This enabled us to propose an improved parameter extraction methodology for the whole vertical FDSOI stack from gate to substrate using back biasing effect. (C) 2014 Elsevier Ltd. All rights reserved.
- Files in This Item
- There are no files associated with this item.
- Appears in
Collections - College of Engineering > ETC > 1. Journal Articles
Items in ScholarWorks are protected by copyright, with all rights reserved, unless otherwise indicated.